Contract chipmaker TSMC has introduced a brand new manufacturing course of which has been dubbed N4P. Regardless of the title, like N4, it is a tweaked model of the N5 course of know-how. TSMC describes N4P as a “performance-focused enhancement of the 5-nanometer know-how platform,” and it says it may well ship enhancements throughout the board – with regard to efficiency, effectivity, and density.
Pondering over the naming/household to begin with, there have been 5 5-nanometer processes launched by TSMC to date. It began with N5, which branched with offshoots to N5P and N5HPC. Then there was N4, which has been improved to ship the brand new N4P.
Speaking of efficiency comparisons and so forth, TSMC says that the brand new N4P can provide “as much as 11 per cent extra efficiency than the N5 course of,” however when in comparison with N4, it’s only a 6 per cent uplift. Different comparisons given solely the brand new course of vs N5, the N4P being 22 per cent extra vitality environment friendly with a six per cent improve in transistor density.
An underlying high quality of N4P which can make it extra profitable/in style is that it additionally provides decreased complexity, with wafer cycle time reduce, because it requires fewer masks. In fact, machine time is cash, so it is a worthwhile enchancment.
Lastly, N4P is alleged to be well-supported by TSMC’s complete design ecosystem for silicon IP and Digital Design Automation (EDA). Present prospects can simply migrate from different 5-nanometer platforms, for quicker and extra power-efficient product refreshes with minimal effort.
Count on the primary TSMC N4P tape-outs in H2 subsequent yr, with product launches across the similar time as N3 (providing full node scaling in comparison with N5) debuts in 2023, with N4P representing worth but nonetheless a really fashionable resolution.